MC54HC154 |
RFQ for MC54HC154 Required Field |
 |
| Product | Manufacturers | Pack | D/C |
| MC54HC154 | - | CDIP24 | 8817+ |
The MC54/74HC154 is identical in pinout to the LS154. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
This device, when enabled, selects one of 16 activelow outputs. Two activelow Chip Selects are provided to facilitate the chipselect, demultiplexing, and cascading functions. When either Chip Select is high, all outputs are high. The demultiplexing function is accomplished by using the Address inputs to select the desired device output. Then, while holding one chip select input low, data can be applied to the other chip select input (see Application Note).
The HC154 is primarily used for memory address decoding and data routing applications.
Features |
| • Output Drive Capability: 10 LSTTL Loads• Outputs Directly Interface to CMOS, NMOS, and TTL• Operating Voltage Range: 2 to 6 V• Low Input Current: 1 A• High Noise Immunity Characteristic of CMOS Devices• In Compliance with the Requirements Defined by JEDEC Standard No. 7A• Chip Complexity: 192 FETs or 48 Equivalent Gates |
|
Symbol |
Parameter |
Value |
Unit |
|
VCC |
DC Supply Voltage (Referenced to GND) |
0.5 to +7.0 |
V |
|
Vin |
DC Input Voltage (Referenced to GND) |
1.5 to VCC +1.5 |
V |
|
Vout |
DC Output Voltage (Referenced to GND) |
0.5 to VCC + 0.5 |
V |
|
Iin |
DC Input Current, per Pin |
± 20 |
mA |
|
Iout |
DC Output Current, per Pin |
± 25 |
mA |
|
ICC |
DC Supply Current, VCC and GND Pins |
± 50 |
mA |
|
PD |
Power Dissipation in Still Air, Plastic or Ceramic DIP† SOIC Package† |
750 500 |
mW |
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